1. Field of the Invention
The present invention relates to a liquid crystal display, and more particularly to a liquid crystal display that is adaptive for preventing transition of liquid crystals from a bend state to a splay state caused by an external impact when using a data voltage lower than a transition voltage Vtr while actually driven, and a driving method thereof.
2. Discussion of the Related Art
Generally, liquid crystal displays control the light transmittance of liquid crystal cells in accordance with video signals to display a picture. An active matrix liquid crystal display provided with a switching device by liquid crystal cells is suitable for displaying a motion picture. A thin film transistor (hereinafter, referred to as TFT) is mainly used as a switching device in the active matrix liquid crystal display. Because such a liquid crystal display can be made into a smaller device in size than the existing cathode ray tube, it has been widely used for office automation equipment such as a copy machine, etc. and portable equipment such as a cellular phone, a pager etc., as well as a personal computer and a notebook computer.
As shown in FIG. 1, the related art liquid crystal display includes a liquid crystal display panel 2 having liquid crystal cells arranged in a matrix, a gate driver 4 to drive gate lines GL0 to GLn of the liquid crystal display panel 2, a data driver 6 to drive data lines DL1 to DLm of the liquid crystal display panel 2, and a timing controller 8 to control the gate driver 4 and the data driver 6.
The liquid crystal display panel 2 includes liquid crystal cells arranged in a matrix and a TFT formed at each intersection area of an n+1 number of gate lines GL0 to GLn and an m number of data lines DL1 to DLm.
The timing controller 8 controls gate voltages applied to the gate lines GL0 to GLn and data voltages applied to the data lines Dl1 to DLm. The timing controller 8 generates dot clocks (DCLK) and gate start pulses (GSP) in use of horizontal/vertical synchronization signals H, V input from a video card (not shown), thereby controlling the data driver 6 and the gate driver 4. Herein, the dot clocks DCLK are applied to the data driver 6 and gate start pulses GSP are applied to the gate driver 4.
The gate driver 4 includes a shift register to sequentially generate scan pulses in response to the gate start pulse (GSP) input from the timing controller 8, and a level shifter to shift a voltage of the scan pulse to a voltage level suitable for driving the liquid crystal cell. The gate driver 4, as shown in FIG. 2, is supplied with a gate shift clock signal (GSC) having one horizontal period. The gate driver 4, if the gate start pulse (GSP) is applied from the timing controller 8, performs a shifting operation in response to the gate shift clock (GSC). Scan pulses (SP) of one horizontal period, 1H, are sequentially applied to the gate lines GL1 to GLn. The TFT is turned on in response to the scan pulse SP for video data to be charged in the pixel electrode of the liquid crystal cell.
The data driver 6 receives the dot clock (DCLK) from the timing controller 8, together with red R, green G and blue B digital video data. The data driver 6 latches the red R, green G and blue B digital video data in synchronization with the dot clock (DCLK), corrects the latched data in accordance with a gamma voltage V, converts the corrected data into analog data, and then supplies the converted data to the data line DL by lines. Specifically, the data driver 6 converts the corrected data into analog data signal in use of a negative or positive gamma voltage in response to a polarity inversion signal, thereby determining the polarity of the data voltage Vd applied to the data lines DL1 to DLm.
Referring to FIG. 3, a unit pixel of the liquid crystal display includes a TFT formed at an intersection part of the gate line GL and the data line DL, a storage capacitor Cst connected to the previous gate line Gn−1, and a liquid crystal cell Clc connected to the TFT, the storage capacitor Cst and a common voltage source Vcom of an upper plate (not shown).
The TFT supplies data voltages Vd from the data lines DL1 to DLm to the liquid crystal cell Clc in response to the gate high voltage Vgh from the gate lines GL1 to GLn. The liquid crystal cell Clc may be equally indicated as a liquid cell capacitor Clc including a pixel electrode connected to the TFT and the common electrode Vcom that faces the liquid crystal cell Clc with liquid crystals therebetween.
Within the liquid crystal cell, the storage capacitor Cst is formed to sustain the data voltage Vd charged in the liquid crystal cell capacitor Clc until the next data voltage Vd is charged, i.e., while a gate low voltage Vgl is applied. The storage capacitor Cst is formed between the previous gate line and the pixel electrode. Such a liquid crystal cell controls light transmittance by having the liquid crystals with dielectric constant anisotropy changed in an arrangement state in accordance with the data voltage Vd charged through the TFT, thereby implementing gray levels.
In FIG. 4, gate high voltage (Vgh) and gate low voltages (Vgl) are supplied to the gate lines GL1 to GLn. The gate lines GL1 to GLn are supplied with the gate high voltage Vgh for a corresponding horizontal period 1H, and with the gate low voltage Vgl for the remaining period. The gate low voltage Vgl is applied to the gate line formed on the uppermost side for the storage capacitor Cst of the first gate line GL. Scan pulses (SP) with the gate high voltage Vgh turn on the TFT switch, and the liquid crystal cell is charged with video data supplied from the data driver 6 while the TFT is turned on. As the gate high voltage Vgh supplied to the gate lines GL1 to GLn is changed to the gate low voltage Vgl, the TFT is turned off, and the storage capacitor Cst causes the voltage VLC of the liquid crystal cell to be dropped by as much as a feed-through voltage ΔVp at that time. The feed-through voltage is defined as in Formula 1.ΔVp=Cgs(Vgh−Vgl)/(Cgs+Cst+CLC)  [Formula 1]
Herein, ΔVp represents the amount of change of the voltage applied to a liquid crystal cell, Cgs represents a capacitor between a gate electrode G and a source electrode S. Further, Cst represents a storage capacitor, CLc represents a capacitor of the liquid crystal cell, Vgh represents a gate high voltage, and Vgl represents a gate low voltage.
The polarity of a voltage is applied to the liquid crystal cell for each frame. Herein, the voltage applied to the liquid crystal cell is decreased by as much as the feed-through voltage ΔVp in the positive frame, and the voltage applied to the liquid crystal cell is increased by as much as the feed-through voltage ΔVp in the negative frame. The amount of change of the voltage applied to the liquid crystal cell by the feed-through voltage ΔVp is shown as in FIG. 4.
A twisted nematic (TN) mode is generally used in liquid crystals for driving such a liquid crystal display. The liquid crystal cell of TN mode, where a twisted angle of liquid crystal alignment is 90°, changes an alignment state of the liquid crystals in accordance with an application of an electric field, to transmit light. However, using the TN mode for liquid crystals has the problems of a narrow viewing angle and a slow response speed.
To overcome these disadvantages of the TN mode, it has been suggested that liquid crystals can be used with an in-plane switch (IPS) mode or an optically compensated bend (OCB) mode. The OCB mode of the above-mentioned modes has a wider viewing angle and a faster response speed than the TN mode.
Referring to. FIG. 5 and FIG. 6, the LCD panel of an OCB mode includes an upper substrate 10 sequentially provided with a color filter array (not shown) and an alignment film (not shown); a lower substrate 12 provided with a TFT array (not shown) and an alignment film (not shown); a liquid crystal 18 injected into a designated gap between the upper substrate 10 and the lower substrate 12 defined by a spacer (not shown); upper and lower polarizers 14 and 22 arranged respectively on the outsides of the upper and lower substrates 10 and 12; an upper compensating film 16 arranged between the upper substrate 10 and the upper polarizer 14; and a compensating film 20 arranged between the lower substrate 12 and the lower polarizer 22 to compensate a phase of an incident light for increasing a viewing angle.
The alignment films of the upper substrate 10 and the lower substrate 12 are subjected to an alignment treatment in the same direction. The liquid crystal 18 between the upper substrate 10 and the lower substrate 12 maintains a splay state, which is an initial alignment state in accordance with an alignment treatment direction of the alignment film when the voltage of an electric field between the upper and lower substrate is less than a specified voltage Vtr. In other words, the liquid crystal molecules are arranged at tilt angles of θ° and −θ° at the surfaces of the upper and lower alignment films, respectively. The tilt angles of the liquid crystal molecules decrease towards the center of the liquid crystal cell such that liquid crystal molecules at the center have an angle of 0°. The liquid crystal molecules having such a splay state are changed into a bend state at a voltage more than the specified voltage Vtr. The time required for changing the liquid crystal molecules from the splay state into a bend state is referred to as “transition time”.
The tilt angles of the liquid crystal molecules at the surfaces of the upper and lower alignment films when in the bend state are ±θ, wherein θ is usually about 5°˜15°. However, the tilt angles of the liquid crystal molecules increase towards the center of the liquid crystal cell such that liquid crystal molecules at the center have an angle of 90°.
FIG. 7 is a diagram representing light transmittance in accordance with a voltage of an OCB mode liquid crystal cell.
Referring to FIG. 7, liquid crystal molecules in the bend state have a characteristic in which light transmittance linearly decreases as the voltage of the electric field increases between the upper and lower substrates. Therefore, the liquid crystal molecules having a bend state are suitable for implementing a gray scale and thus for realizing a picture in an LCD panel.
However, the liquid crystals in the splay state irregularly transmit light at a voltage less than the transition voltage Vtr, and cause stains or flickers to appear in the LCD panel for a short time. Accordingly, the liquid crystal display, using the OCB mode, has a higher voltage than the transition voltage Vtr to change from the splay state into the bend state.
In this way, the OCB mode liquid crystal cell has the liquid crystal changed from the splay state into the bend state at a higher voltage than the transition voltage Vtr in the initial stage, thereby being stabilized.
However, in a case in which an external impact is applied to the liquid crystal cell while actually driven, a pixel voltage at the liquid crystal cell is less than the transition voltage Vtr, so the liquid crystals in the bend state are changed into the splay state to become unstabilized. Therefore, stains and flickers, which occur when liquid crystals are in the splay state, appear on the LCD panel while actually driven.